MOnSter 6502 Bringup Status

MOnSter 6502 1 Comment

Wow, Maker Faire was totally nuts! Lots of people came by to check out the MOnSter 6502 and I had some interesting conversations with people. After taking a few days to recover, I dug back into the bringup and validation process.

The MOnSter 6502 now passes my basic validation test suite. I discovered two problems.

It was not booting consistently, and kept getting stuck in a bad state where the ‘1’ bit would run off the end of the instruction sequencer, or it would get stuck in a loop running the same (wrong) instruction over and over again. The RESG latch also was stuck on.

When RESET goes low, it turns on RESG. This forces the BRK instruction (which is meant to trigger a software interrupt) into the predecode IR (instruction register) by deasserting D1x1, sets the vector address to the reset vector (instead of the IRQ vector, as BRK normally does), and prevents BRK from writing to the stack so it can’t push the program counter and status bits. When BRK is done, it clears the RESG latch. This is a very clever hack that the original designers used so they could avoid having to run a reset line all over the chip.

Oddly, even when RESG was set (I could tell by a convenient LED), the contents of the IR were not all ‘0’ (again, according to convenient LEDs). Turns out the quad FET array devices used in the IR had some leads that were not soldered down correctly. Fixing that solved the problem.

After trying to run the validation suite again, it started failing the cycle-by-cycle validation on the first time an actual BRK instruction was supposed to be executed. BRK saves the least significant byte of the program counter the most significant byte, and finally the contents of the status register to the stack (with the B bit set so your interrupt service routine can tell the difference between BRK and a hardware IRQ). In this case, it was writing the most significant byte and the status register to the wrong locations in memory.

So I hard-wired the PHA (PusH Accumulator) instruction onto the data bus so I could observe a very simple instruction write to the stack. The value was written correctly, but instead of decrementing the stack pointer by 1, it subtracted 18! PHA decrements the SP by loading it onto the ADL bus and setting the ALU to add with the B input hold register connected to ADL and the A input hold register connected to the special bus. The idea is that by adding $FF you decrease the value by one. This only works if nothing else is driving the special bus except for the precharge pullup MOSFETs. It’s another clever hack from the original 6502 designers. In my case, instead of seeing $FF, the ALU was latching $EE! I tried adding a small amount of capacitance from special bus lines 0 and 4 to ground to keep the voltage up from the precharge cycle, and PHA then worked correctly. I ended up adding capacitors to all the bus lines just in case.

After those fixes my basic validation test suite passed without any further issues.

The next step is to run a more complete set of validation tests, and then BASIC!

The MOnSter 6502

MOnSter 6502 8 Comments

So, I made a thing. A really big thing. Really big and really crazy.

You might have seen my discrete 555 and 741 IC electronics kits. Well, a while back I had this idea about creating a discrete version of a microprocessor, but it just sounded too difficult, time consuming, or impractical. And part of me didn’t want to do it, because it just sounds so tedious to design–at every stage, I was secretly hoping to find a show-stopping problem. But part of me was really interested to see if it could be done.

At dinner, Windell and I went through a thought experiment to see if it would even be possible. We weren’t sure how many transistors were in a 6502 (more than 1,000 but less than 10,000). If four surface mount transistors can fit in a square centimeter, then the board would need to be about 1,000 square centimeters, or about 32cm (13in) on a side, which is not as huge as we originally thought. Darn it, time to investigate further!

The hard work of reverse engineering the actual 6502 has already been done by the folks at I was able to extract the netlist from their Javascript simulation, which contains a list of all the transistors and every single wire connecting them together.

The 6502 uses dynamic NMOS logic, so it has a large number of “transmission gate” transistors that are used to switch currents. For various technical reasons, only a 4-terminal MOSFET can make an effective NMOS transmission gate. Those are really hard to find (nearly all MOSFETs are 3-terminal devices), but I found one–it’s an array of 4 MOSFETs on a single chip with a separate substrate pin.

I ran simulations using the transistors I found, and noticed that basic combinational logic and latches worked. I ordered parts and prototyped a few circuits. They worked perfectly.

I designed and ordered an OSH Park circuit board with just 8 bits of the program counter register. I thought to myself that there was no way such a complex circuit could work, especially with the ripple carry propagation. Well, it worked.

It was time to bite the bullet. I wrote a Python program that turned the Visual6502 netlist into a 3,510 line spreadsheet, and I began entering (on July 3, 2015) the transistors one by one into the schematic, highlighting each transistor as I finished it. Along the way, I noticed that the Visual6502 netlist had three extra transistors, T1088, T1023, and T3037.

(An example of an extra transistor)

When I was done with all 61 pages, I wrote another Python program to compare my schematic against the original netlist and corrected a few mistakes. Then I added 167 colorful LEDs to various control lines and data bits, and a few protection components.

The layout came next. In the layout software, I placed 4,304 parts by hand and wired them up manually (no autorouter) over the course of several months, finishing the last transistor on Dec 1, 2015.

And last Thursday, the first boards came in. They are beautiful!

We’ll be bringing it to Maker Faire, so I have a week to work on bringup testing. Wish me luck!

You can find more details on the main project site,

The Battle of Fives: How the NE555 and LM555 are Different

Uncategorized No Comments

A customer recently asked us some questions about the Three Fives discrete 555 timer kit. One in particular really got my attention.

What is the difference between the National Semiconductor LM555 and the Signetics NE555 timer ICs? Well, the Signetics part certainly came first and the National part was a second source, but the customer noted that The 555 Timer Applications Sourcebook, on page 5-31, states

…Table S-2 points out that the threshold overrides the trigger for the type LM555H (National), but the threshold is overridden by the trigger for the type NE555V (Signetics).

Let’s compare the two. First, here’s the NE555 schematic (click for larger versions).
And here’s the LM555 schematic. I’ve kept the component numbering consistent with the NE555 datasheet rather than National’s datasheet to make comparisons easy.
The LM555 makes three minor changes to the timer design:

  • The trigger comparator now has a current mirror active load (Q26 and Q27) instead of resistor load R6.
  • The threshold comparator gets a current mirror active load (Q28 and Q29) and an emitter follower buffer Q30.
  • R10 is now 7.5K instead of 15K, but I suspect there is a typo. Imagine several generations of photocopies. The 1 starts to look like a 7, and a decimal point appears.

The most interesting changes are the first two. How do these changes reverse the priority of the two comparator inputs?

The original NE555 gives priority to the trigger signal because transistor Q15 can always overpower the current coming from Q19A and Q6.

For the LM555 in the normal case where the trigger signal is active, Q15 is on, Q16 is off, and Q17 is on hard since its base is pulled to VCC through Q18, R10, and the current mirror Q19.
However, if both the trigger and threshold inputs are active, then both Q15 and Q30 are on. This leads to an interesting situation where the collector of Q18 is pulled to ground through Q15 and Q30. At that point, there’s nothing to provide current to the base of Q17, and any residual charge will probably drain away through the reverse leakage current of Q18. Q17 then turns off, and the output does the opposite of the NE555! Leaving the gate of Q17 hanging like that seems really odd, so I bet this was unintended behavior. I ran some LTSpice simulations so you can see what is going on. First up is the NE555:
NE555 Flop
And here is the LM555:
LM555 Flop
If you look carefully at the V(comp) trace right before 12ms, it actually goes negative due to Q18 behaving like a diode clamp.
This behavior doesn’t seem to get in the way of normal operation, but it is something a circuit designer would need to take into account. This is why designers and purchasing people should always be wary of “drop in” replacements, especially when the manufacturer claims “improved performance!”
National Semiconductor made the changes to improve the performance of the comparators, specifically their performance over temperature. I ran some more simulations so you can see the difference. Here is the NE555 set up in a simple astable circuit, with superimposed waveforms at 0C, 35C, and 70C:
And the LM555 at the same temperature ranges.
Note that I put the temperature coefficients only on resistors inside the 555 timers, not on any of the external oscillator components.
If you want to play with the LTSpice circuits, click the links below to download them.
A quick side note about the names: The LM in the part number stands for Linear Monolithic, which National Semiconductor used to describe many of their analog ICs. The NE probably stands for Network Electronics (the sources are anecdotal). Apparently the Signetics name came from Signal Network Electronics.

CRT Phosphor Video

Uncategorized 1 Comment

Inspired by commenter Katemonster, I’ve put together a short clip with a couple of CRTs from my collection, demonstrating various types of phosphors. There are charts out there that talk about persistence using vague terms like “medium” (compared to what?), so it’s nice to see a real video showing what such a CRT actually looks like.

For the video I’ve used my “orbiter” demo that uses Newton’s law of gravity and Newton’s 2nd law of motion (F=MA) to generate simulated planets that orbit around a sun. It’s a nice way to demonstrate persistence (the way the phosphor fades as the electron beam moves away).

P1 Phosphor
This is the basic green phosphor. At 525nm primary color wavelength, it looks slightly more blue than common super-bright green LEDs. The chart linked above lists the persistence time as 20ms which seems reasonable. The formulation for this phosphor varies between manufacturers so some tubes might be slower than others. It’s very common in early oscilloscopes and oscillographs, and apparently some radar systems as well.

P2 Phosphor
The P2 phosphor color has even more blue in it than the P1–it’s very close to “stoplight green”. The persistence is much longer as you can see in the video (30 seconds or more, depending on the ambient light levels). The charts and reference documents I have list the primary applications as oscillography and radar.

P7 Phosphor
P7 is a very interesting phosphor. It is a cascade phosphor, meaning that it has two layers of material. The electron beam strikes the first (outer) layer which emits a bright blue light with some light near ultraviolet. This high energy light excites the second layer (inner, in contact with the glass) which is a much slower material that emits a yellowish-green light with a very long persistence (around a minute). In the video I move the “orbit” trace off to the side so you can see that original afterimage persists.

It was used mostly for radar and sometimes in oscilloscopes to capture one-time events before storage tubes were invented.

So why use a cascade phosphor? One source states that it was originally designed to be used in intensity-modulated displays (varying brightness levels), but it turns out it also helped prevent radar jamming. Since the jamming signal was not synced to the radar pulses, a long persistence phosphor could average out the jamming signal and allow the operator to see the true signal as viewed on an A-scope (time-based pulse waveform monitor). [Cathode Ray Tube Displays, MIT Radiation Laboratory Series, pg. 626]

P12 Phosphor
This one is my favorite. It’s an orange medium-persistence (a few seconds) phosphor that was apparently used for radar indicators. I don’t know of any that were used in oscilloscopes.

P31 Phosphor
The P31 phosphor was invented as an improved P1 phosphor. It’s much brighter (P1 is 32% as bright) and has short persistence (<1ms). The color has a bit more blue in it--in fact, very close to the P2 phosphor's color. I would say most analog oscilloscopes from the 70s to today use CRTs with the P31 phosphor.

In many cases these CRTs would be installed behind a colored piece of plastic acting as a color filter. For example, P7 CRTs were often installed with an orange plastic filter in front to make the blue/white phosphor look more similar to the secondary yellow phosphor. P31 CRTs usually have a blue or green plastic filter.

For further reading:

CRT Driver Boards, Now With Altium Sources

Uncategorized No Comments

Take a look at my crt-driver GitHub repository. I tidied things up a bit and more importantly, released the Altium project files, schematics, boards, and even the output job file. It’s all licensed under the Creative Commons Attribution-ShareAlike 3.0 license. Read the Creative Commons page for the full terms, but basically you can share or adapt any of it as long as you give me credit (a link to this blog would be appreciated) and make sure that you keep the same license so that others can do the same.

If you don’t have Altium (expensive, closed source), you can at least open and edit the schematics with CircuitMaker (free, closed source, limited). Sadly, CircuitMaker will not let you edit the Altium PCB layout.

« Previous Entries